Basic Rules of VHDL coding for Beginner

:-Basic Rules of VHDL which should be in mind before start with This language

1-Its Hardware description language that means it’s not an only programming language it’s a language with the help of we can design a new hardware. Every single line of your code can affect hardware. we can design a new controller also and other digital logic using VHDL language.

2-you have a little knowledge how your hardware should look like because VHDL is a very powerful language you should have knowledge about basic digital circuits. Design a digital circuit is similar to other high level programming language but VHDL is complicated language it’s not like other programming language.

:-TOOL needed for VHDL

     Every engineer without its tool is like angel without her magical wand so here also to work with VHDL language you need some tool.Here I mention few basic tool which you need during your digital design.

:-SOFTWARE

XILINX ISE –This is IDE(integrated development Enviroment) where you write                    your VHDL codes its comes with inbuilt simulation tool names ISIM which is use to see output.

Modelsim student PE- This is a product of mentor graphics you can download a license student version its use for simulation purpose.

:-Hardware

FPGA Board –field programmable gate array this is hardware in which we will test our design.

CPLD  Board- Complex programmable logic device this is also we can use for same purpose.

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